Efnisyfirlit

• Logic and Computer Design Fundamentals
  • Copyright
• Contents
• Preface
• Chapter 1: Digital Systems and Information
  • Information Representation
    • The Digital Computer
    • Beyond the Computer
    • More on the Generic Computer
  • Abstraction Layers in Computer Systems Design
    • An Overview of the Digital Design Process
  • Number Systems
    • Binary Numbers
    • Octal and Hexadecimal Numbers
    • Number Ranges
  • Arithmetic Operations
    • Conversion from Decimal to Other Bases
  • Decimal Codes
  • Alphanumeric Codes
    • ASCII Character Code
    • Parity Bit
  • Gray Codes
  • Chapter Summary
    • References
    • Problems
• Chapter 2: Combinational Logic Circuits
  • Binary Logic and Gates
    • Binary Logic
    • Logic Gates
    • HDL Representations of Gates
  • Boolean Algebra
    • Basic Identities of Boolean Algebra
    • Algebraic Manipulation
    • Complement of a Function
  • Standard Forms
    • Minterms and Maxterms
    • Sum of Products
    • Product of Sums
  • Two-Level Circuit Optimization
    • Cost Criteria
    • Map Structures
    • Two-Variable Maps
    • Three-Variable Maps
  • Map Manipulation
    • Essential Prime Implicants
    • Nonessential Prime Implicants
    • Product-of-Sums Optimization
    • Don’t-Care Conditions
  • Exclusive-Or Operator and Gates
    • Odd Function
  • Gate Propagation Delay
  • HDLs Overview
    • Logic Synthesis
  • HDL Representations—VHDL
  • HDL Representations—Verilog
  • Chapter Summary
    • References
    • Problems
• Chapter 3: Combinational Logic Design
  • Beginning Hierarchical Design
  • Technology Mapping
  • Combinational Functional Blocks
  • Rudimentary Logic Functions
    • Value-Fixing, Transferring, and Inverting
    • Multiple-Bit Functions
    • Enabling
  • Decoding
    • Decoder and Enabling Combinations
    • Decoder-Based Combinational Circuits
  • Encoding
    • Priority Encoder
    • Encoder Expansion
  • Selecting
    • Multiplexers
    • Multiplexer-Based Combinational Circuits
  • Iterative Combinational Circuits
  • Binary Adders
    • Half Adder
    • Full Adder
    • Binary Ripple Carry Adder
  • Binary Subtraction
    • Complements
    • Subtraction Using 2s Complement
  • Binary Adder-Subtractors
    • Signed Binary Numbers
    • Signed Binary Addition and Subtraction
    • Overflow
    • HDL Models of Adders
    • Behavioral Description
  • Other Arithmetic Functions
    • Contraction
    • Incrementing
    • Decrementing
    • Multiplication by Constants
    • Division by Constants
    • Zero Fill and Extension
  • Chapter Summary
    • References
    • Problems
• Chapter 4: Sequential Circuits
  • Sequential Circuit Definitions
  • Latches
    • SR and SR Latches
    • D Latch
  • Flip-Flops
    • Edge-Triggered Flip-Flop
    • Standard Graphics Symbols
    • Direct Inputs
  • Sequential Circuit Analysis
    • Input Equations
    • State Table
    • State Diagram
    • Sequential Circuit Simulation
  • Sequential Circuit Design
    • Design Procedure
    • Finding State Diagrams and State Tables
    • State Assignment
    • Designing with D Flip-Flops
    • Designing with Unused States
    • Verification
  • State-Machine Diagrams and Applications
    • State-Machine Diagram Model
    • Constraints on Input Conditions
    • Design Applications Using State- Machine Diagrams
  • HDL Representation for Sequential Circuits—VHDL
  • HDL Representation for Sequential Circuits—Verilog
  • Flip-Flop Timing
  • Sequential Circuit Timing
  • Asynchronous Interactions
  • Synchronization and Metastability
  • Synchronous Circuit Pitfalls
  • Chapter Summary
    • References
    • Problems
• Chapter 5: Digital Hardware Implementation
  • The Design Space
    • Integrated Circuits
    • CMOS Circuit Technology
    • Technology Parameters
  • Programmable Implementation Technologies
    • Read-Only Memory
    • Programmable Logic Array
    • Programmable Array Logic Devices
    • Field Programmable Gate Array
  • Chapter Summary
    • References
    • Problems
• Chapter 6: Registers and Register Transfers
  • Registers and Load Enable
    • Register with Parallel Load
  • Register Transfers
  • Register Transfer Operations
  • Register Transfers in VHDL and Verilog
  • Microoperations
    • Arithmetic Microoperations
    • Logic Microoperations
    • Shift Microoperations
  • Microoperations on a Single Register
    • Multiplexer-Based Transfers
    • Shift Registers
    • Ripple Counter
    • Synchronous Binary Counters
    • Other Counters
  • Register-Cell Design
  • Multiplexer and Bus-Based Transfers for Multiple Registers
    • High-Impedance Outputs
    • Three-State Bus
  • Serial Transfer and Microoperations
    • Serial Addition
  • Control of Register Transfers
    • Design Procedure
  • HDL Representation for Shift Registers and Counters—VHDL
  • HDL Representation for Shift Registers and Counters—Verilog
  • Microprogrammed Control
  • Chapter Summary
    • References
    • Problems
• Chapter 7: Memory Basics
  • Memory Definitions
  • Random-Access Memory
    • Write and Read Operations
    • Timing Waveforms
    • Properties of Memory
  • SRAM Integrated Circuits
    • Coincident Selection
  • Array of SRAM ICs
  • DRAM ICs
    • DRAM Cell
    • DRAM Bit Slice
  • DRAM Types
    • Synchronous DRAM (SDRAM)
    • Double-Data-Rate SDRAM (DDR SDRAM)
    • RAMBUS® DRAM (RDRAM)
  • Arrays of Dynamic RAM ICs
  • Chapter Summary
    • References
    • Problems
• Chapter 8: Computer Design Basics
  • Introduction
  • Datapaths
  • The Arithmetic/Logic Unit
    • Arithmetic Circuit
    • Logic Circuit
    • Arithmetic/Logic Unit
  • The Shifter
    • Barrel Shifter
  • Datapath Representation
  • The Control Word
  • A Simple Computer Architecture
    • Instruction Set Architecture
    • Storage Resources
    • Instruction Formats
    • Instruction Specifications
  • Single-Cycle Hardwired Control
    • Instruction Decoder
    • Sample Instructions and Program
    • Single-Cycle Computer Issues
  • Multiple-Cycle Hardwired Control
    • Sequential Control Design
  • Chapter Summary
    • References
    • Problems
• Chapter 9: Instruction Set Architecture
  • Computer Architecture Concepts
    • Basic Computer Operation Cycle
    • Register Set
  • Operand Addressing
    • Three-Address Instructions
    • Two-Address Instructions
    • One-Address Instructions
    • Zero- Address Instructions
    • Addressing Architectures
  • Addressing Modes
    • Implied Mode
    • Immediate Mode
    • Register and Register-Indirect Modes
    • Direct Addressing Mode
    • Indirect Addressing Mode
    • Relative Addressing Mode
    • Indexed Addressing Mode
    • Summary of Addressing Modes
  • Instruction Set Architectures
  • Data-Transfer Instructions
    • Stack Instructions
    • Independent versus Memory- Mapped I/O
  • Data-Manipulation Instructions
    • Arithmetic Instructions
    • Logical and Bit- Manipulation Instructions
    • Shift Instructions
  • Floating-Point Computations
    • Arithmetic Operations
    • Arithmetic Operations
    • Standard Operand Format
  • Program Control Instructions
    • Conditional Branch Instructions
    • Procedure Call and Return Instructions
  • Program Interrupt
    • Types of Interrupts
    • Processing External Interrupts
  • Chapter Summary
    • References
    • Problems
• Chapter 10: Risc and Cisc Central Processing Units
  • Pipelined Datapath
    • Execution of Pipeline Microoperations
  • Pipelined Control
    • Pipeline Programming and Performance
  • The Reduced Instruction Set Computer
    • Instruction Set Architecture
    • Addressing Modes
    • Datapath Organization
    • Control Organization
    • Data Hazards
    • Control Hazards
  • The Complex Instruction Set Computer
    • ISA Modifications
    • Datapath Modifications
    • Control Unit Modifications
    • Microprogrammed Control
    • Microprograms for Complex Instructions
  • More on Design
    • Advanced CPU Concepts
    • Recent Architectural Innovations
  • Chapter Summary
    • References
    • Problems
• Chapter 11: Input—Output and Communication
  • Computer I/O
  • Sample Peripherals
    • Keyboard
    • Hard Drive
    • Liquid Crystal Display Screen
    • I/O Transfer Rates
  • I/O Interfaces
    • I/O Bus and Interface Unit
    • Example of I/O Interface
    • Strobing
    • Handshaking
  • Serial Communication
    • Synchronous Transmission
    • The Keyboard Revisited
    • A Packet-Based Serial I/O Bus
  • Modes of Transfer
    • Example of Program-Controlled Transfer
    • Interrupt-Initiated Transfer
  • Priority Interrupt
    • Daisy Chain Priority
    • Parallel Priority Hardware
  • Direct Memory Access
    • DMA Controller
    • DMA Transfe
  • Chapter Summary
    • References
    • Problems
• Chapter 12: Memory Systems
  • Memory Hierarchy
  • Locality of Reference
  • Cache Memory
    • Cache Mappings
    • Line Size
    • Cache Loading
    • Write Methods
    • Integration of Concepts
    • Instruction and Data Caches
    • Multiple-Level Caches
  • Virtual Memory
    • Page Tables
    • Translation Lookaside Buffer
    • Virtual Memory and Cache
  • Chapter Summary
    • References
    • Problems
• Index

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